IEEE - Institute of Electrical and Electronics Engineers, Inc. - Methods for reducing events in sequential circuit fault simulation

Author(s): Rudnick, E.M. ; Niermann, T.M. ; Patel, J.H.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1991
Conference Location: Santa Clara, CA, USA, USA
Conference Date: 11 November 1991
Page(s): 546 - 549
ISBN (Paper): 0-8186-2157-5
DOI: 10.1109/ICCAD.1991.185328
Regular:

Methods are investigated for reducing events in sequential circuit fault simulation by reducing the number of faults simulated for each test vector. Inactive faults, which are guaranteed to have... View More

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