IEEE - Institute of Electrical and Electronics Engineers, Inc. - SADE: a graphical tool for VHDL-based system analysis

Author(s): Lahti, J. ; Sipola, M. ; Kivela, J.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1991
Conference Location: Santa Clara, CA, USA, USA
Conference Date: 11 November 1991
Page(s): 262 - 265
ISBN (Paper): 0-8186-2157-5
DOI: 10.1109/ICCAD.1991.185248
Regular:

A graphical tool for system analysis called SADE (System's Analyst's Design Environment) is described. The tool can generate behavioral VHDL (VHSIC Hardware Description Language) models from... View More

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