IEEE - Institute of Electrical and Electronics Engineers, Inc. - ASIC synthesis cost model

Author(s): Lewis, J. ; Carlson, S. ; Rau, J.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1990
Conference Location: Rochester, NY, USA
Conference Date: 17 September 1990
DOI: 10.1109/ASIC.1990.186071
Regular:

Following a brief introduction to hardware description language (HDL) synthesis and logic synthesis, the impact of synthesis technology on the various aspects of an ASIC product's lifecycle is... View More

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