IEEE - Institute of Electrical and Electronics Engineers, Inc. - A parallel pattern mixed-level fault simulator

Author(s): Tyh-Song Hwang ; Chung Len Lee ; Wen Zen Shen ; Ching Ping Wu
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1990
Conference Location: Orlando, FL, USA, USA
Conference Date: 24 June 1990
Page(s): 716 - 719
ISBN (Paper): 0-89791-363-9
ISSN (Paper): 0738-100X
DOI: 10.1109/DAC.1990.114946
Regular:

A parallel pattern mixed-level fault simulator is described and demonstrated. The switch level allows the simulator to treat transistor faults such as stuck-open and stuck-short faults, the gate... View More

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