IEEE - Institute of Electrical and Electronics Engineers, Inc. - The influences of fault type and topology on fault model performance and the implications to test and testable design

Author(s): Butler, K.M. ; Mercer, M.R.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1990
Conference Location: Orlando, FL, USA, USA
Conference Date: 24 June 1990
Page(s): 673 - 678
ISBN (Paper): 0-89791-363-9
ISSN (Paper): 0738-100X
DOI: 10.1109/DAC.1990.114938
Regular:

A new method, difference propagation, is proposed to analyze fault models in combinational circuits. It propagates Boolean functional information represented by ordered binary decision diagrams.... View More

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