IEEE - Institute of Electrical and Electronics Engineers, Inc. - SOPRANO: an efficient automatic test pattern generator for stuck-open faults in CMOS combinational circuits

Author(s): Lee, H.K. ; Ha, D.S.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1990
Conference Location: Orlando, FL, USA, USA
Conference Date: 24 June 1990
Page(s): 660 - 666
ISBN (Paper): 0-89791-363-9
ISSN (Paper): 0738-100X
DOI: 10.1109/DAC.1990.114936
Regular:

The key idea of SOPRANO is to convert a CMOS circuit into an equivalent gate-level circuit and SOP faults into the equivalent stuck-at-faults. Then SOPRANO derives test patterns for SOP faults... View More

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