IEEE - Institute of Electrical and Electronics Engineers, Inc. - Speed up of test generation using high-level primitives

Author(s): Kunda, R.P. ; Narain, P. ; Abraham, J.A. ; Rathi, B.D.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1990
Conference Location: Orlando, FL, USA, USA
Conference Date: 24 June 1990
Page(s): 594 - 599
ISBN (Paper): 0-89791-363-9
ISSN (Paper): 0738-100X
DOI: 10.1109/DAC.1990.114923
Regular:

A general methodology to speed up the test generation process for combinational circuits with high-level primitives is proposed. The technique is able to handle circuits in a hierarchical fashion,... View More

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