IEEE - Institute of Electrical and Electronics Engineers, Inc. - PROOFS: a fast, memory efficient sequential circuit fault simulator

Author(s): Niermann, T.M. ; Cheng, W.-T. ; Patel, J.H.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1990
Conference Location: Orlando, FL, USA, USA
Conference Date: 24 June 1990
Page(s): 535 - 540
ISBN (Paper): 0-89791-363-9
ISSN (Paper): 0738-100X
DOI: 10.1109/DAC.1990.114913
Regular:

A super-fast fault simulator for synchronous sequential circuits, called PROOFS, is described. PROOFS achieves high performance by combining all the advantages of differential fault simulation,... View More

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