IEEE - Institute of Electrical and Electronics Engineers, Inc. - An Exploration of Applying Gate-Length-Biasing Techniques to Deeply-Scaled FinFETs Operating in Multiple Voltage Regimes.

Author(s): Tiansong Cui ; Ji Li ; Yanzhi wang ; Shahin Nazarian ; Massoud Pedram
Sponsor(s): IEEE Computer Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Volume: PP
Page(s): 1
ISSN (Online): 2168-6750
DOI: 10.1109/TETC.2016.2640185
Regular:

With the aggressive downscaling of process technologies and the importance of battery-powered systems, reducing leakage power consumption has become a crucial design challenge for IC designers. In... View More

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