IEEE - Institute of Electrical and Electronics Engineers, Inc. - Dimension Effect on Breakdown Voltage of Partial SOI LDMOS

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Dimension effect on breakdown voltage (BV) of lateral double-diffused metal-oxide-semiconductor (LDMOS) field-effect transistor in partial silicon-on-insulator (PSOI) technology is... View More

Dimension effect on breakdown voltage (BV) of lateral double-diffused metal-oxide-semiconductor (LDMOS) field-effect transistor in partial silicon-on-insulator (PSOI) technology is comprehensively studied. The maximum breakdown voltage (BVmax) is examined under various settings of the device length L and the active silicon film thickness t. It is shown that there exists an optimal pair of (L, t) for PSOI at which the highest BV can be achieved. The ratio of L/t is better chosen between 5 and 7 for the device designs, in particular, L/t = 6 can be considered as the optimal one theoretically. Moreover, impacts of the silicon window length Lw and the drift doping concentration Ndr on the breakdown voltage (BV), the on-resistance (Ron) and the figure-of-merit (= BV2/Ron) are also carefully studied.

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Author(s):	Yue Hu ; Huazhen Liu ; Qianqian Xu ; Luwen Wang ; Jing Wang ; Shichang Chen ; Peng Zhao ; Ying Wang ; Gaofeng Wang
Publisher:	IEEE - Institute of Electrical and Electronics Engineers, Inc.
Volume:	PP
Page(s):	1
ISSN (Online):	2168-6734
DOI:	10.1109/JEDS.2017.2690363