IEEE - Institute of Electrical and Electronics Engineers, Inc. - GAAFET versus Pragmatic FinFET at the 5nm Si-Based CMOS Technology Node

Author(s): Ya-Chi Huang ; Meng-Hsueh Chiang ; Shui-Jinn Wang ; Jerry G. Fossum
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Volume: PP
Page(s): 1
ISSN (Online): 2168-6734
DOI: 10.1109/JEDS.2017.2689738
Regular:

Speed and power performances of Si-based stacked-nanowire gate-all-around (GAA) FETs and pragmatic ultra-thin-fin FETs at the 5nm CMOS technology node are projected, compared, and physically... View More

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