IEEE - Institute of Electrical and Electronics Engineers, Inc. - Compact modeling of thermal resistance in bipolar transistors on bulk and SOI substrates

Author(s): A. Pacelli ; P. Palestri ; M. Mastrapasqua
Sponsor(s): IEEE Electron Devices Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 June 2002
Volume: 49
Page Count: 7
Page(s): 1,027 - 1,033
ISSN (Paper): 0018-9383
ISSN (Online): 1557-9646
DOI: 10.1109/TED.2002.1003724
Regular:

Analytical expressions for the thermal resistance of bipolar transistors on bulk and SOI substrates are presented. The models are derived on the basis of intuitive physical pictures and validated... View More

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