IEEE - Institute of Electrical and Electronics Engineers, Inc. - Unified VLSI systolic array design for LZ data compression

Author(s): Shih-Arn Hwang ; Cheng-Wen Wu
Sponsor(s): IEEE Computer Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 August 2001
Volume: 9
Page Count: 11
Page(s): 489 - 499
ISSN (Paper): 1063-8210
ISSN (Online): 1557-9999
DOI: 10.1109/92.931226
Regular:

Hardware implementation of data compression algorithms is receiving increasing attention due to exponentially expanding network traffic and digital data storage usage. In this paper, we propose... View More

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