IEEE - Institute of Electrical and Electronics Engineers, Inc. - Fine-grained and coarse-grained behavioral partitioning with effective utilization of memory and design space exploration for multi-FPGA architectures

Author(s): V. Srinivasan ; S. Govindarajan ; R. Vemuri
Sponsor(s): IEEE Computer Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 February 2001
Volume: 9
Page Count: 19
Page(s): 140 - 158
ISSN (Paper): 1063-8210
ISSN (Online): 1557-9999
DOI: 10.1109/92.920829
Regular:

Reconfigurable computers (RCs) host multiple field programmable gate arrays (FPGAs) and one or more physical memories that communicate through an interconnection fabric. State-of-the-art RCs... View More

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