IEEE - Institute of Electrical and Electronics Engineers, Inc. - Warpage measurement of large area multitilted silicon substrates at various processing conditions

Author(s): S.K. Bhattacharya ; I.C. Ume ; A.X.H. Dang
Sponsor(s): IEEE Components, Packaging, and Manufacturing Technology Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 September 2000
Volume: 23
Page Count: 8
Page(s): 497 - 504
ISSN (Paper): 1521-3331
ISSN (Online): 1557-9972
DOI: 10.1109/6144.868849
Regular:

In order to find a low-cost solution for the future MCM-D packaging, a multitiling approach through the incorporation of several tiles on a large carrier substrate was studied. The multitiling... View More

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