IEEE - Institute of Electrical and Electronics Engineers, Inc. - Design and performance evaluation of microprocessor packaging capacitors using integrated capacitor-via-plane model

Author(s): Yuan-Liang Li ; Teong-Guang Yew ; Chee Yee Chung ; D.G. Fugueroa
Sponsor(s): IEEE Components, Packaging, and Manufacturing Technology Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 August 2000
Volume: 23
Page Count: 7
Page(s): 361 - 367
ISSN (Paper): 1521-3323
ISSN (Online): 1557-9980
DOI: 10.1109/6040.861548
Regular:

As clock speeds increase into the gigahertz regime and rise times decrease into the picosecond regime, the interaction between capacitors and power/ground planes of a package, interposer, or board... View More

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