IEEE - Institute of Electrical and Electronics Engineers, Inc. - A minimal CSP

Author(s): G.A. Rinne ; J.D. Walling ; J.D. Mis
Sponsor(s): IEEE Components, Packaging, and Manufacturing Technology Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 May 2000
Volume: 23
Page Count: 6
Page(s): 206 - 211
ISSN (Paper): 1521-3323
ISSN (Online): 1557-9980
DOI: 10.1109/6040.846635
Regular:

A chip scale package (CSP) using wafer scale processing was developed for a line of low cost, small form factor integrated circuits. The package uses polymeric repassivation and electrodeposited... View More

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