IEEE - Institute of Electrical and Electronics Engineers, Inc. - Optimization of implant anneals to improve transistor performance in a 0.15 μm CMOS technology

Author(s): J. Lutze ; T. Miranda ; G. Scott ; C. Olsen ; N. Variam ; S. Mehta
Sponsor(s): IEEE Electron Devices Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 September 2000
Volume: 21
Page Count: 3
Page(s): 451 - 453
ISSN (Paper): 0741-3106
ISSN (Online): 1558-0563
DOI: 10.1109/55.863108
Regular:

The impact of including a rapid thermal anneal step after the extension implants is examined for a 0.15 /spl mu/m CMOS process. SIMS data will verify that shallower junctions can be obtained with... View More

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