IEEE - Institute of Electrical and Electronics Engineers, Inc. - Accelerated path delay fault simulation

Author(s): Yuejian Wu ; Ivanov, A.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1992
Conference Location: Atlantic City, NJ, USA, USA
Conference Date: 7 April 1992
Page(s): 1 - 6
ISBN (Paper): 0-7803-0623-6
DOI: 10.1109/VTEST.1992.232715
Regular:

Due to fanout in a circuit, the speed efficiency of existing path delay fault simulation algorithms suffers from redundant evaluations of many circuit nodes in the backtrace process of every... View More

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