IEEE - Institute of Electrical and Electronics Engineers, Inc. - Boolean matching using binary decision diagrams with applications to logic synthesis and verification

Author(s): Lai, Y.-T. ; Sastry, S. ; Pedram, M.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1992
Conference Location: Cambridge, MA, USA, USA
Conference Date: 11 October 1992
Page(s): 452 - 458
ISBN (Paper): 0-8186-3110-4
DOI: 10.1109/ICCD.1992.276313
Regular:

An algorithm for Boolean matching based on binary decision diagrams using a level-first search strategy is presented. This algorithm is generally not restricted to circuits with just a few inputs... View More

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