IEEE - Institute of Electrical and Electronics Engineers, Inc. - Analyzing cycle stealing on synchronous circuits with level-sensitive latches

Author(s): Lin, I. ; Ludwig, J.A. ; Eng, K.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1992
Conference Location: Anaheim, CA, USA
Conference Date: 8 June 1992
Page(s): 393 - 398
ISBN (Paper): 0-8186-2822-7
ISSN (Paper): 0738-100X
DOI: 10.1109/DAC.1992.227772
Regular:

The authors present a new method to fully explore cycle steal opportunities in the timing analysis for level-sensitive synchronous circuit designs. The algorithm first constructs a latch graph... View More

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