IEEE - Institute of Electrical and Electronics Engineers, Inc. - Hierarchical concepts in the design of processor arrays

Author(s): Arzt, U. ; Teich, J. ; Schumacher, M. ; Thiele, L.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1992
Conference Location: The Hague, Netherlands, Netherlands
Conference Date: 4 May 1992
Page(s): 232 - 237
ISBN (Paper): 0-8186-2760-3
DOI: 10.1109/CMPEUR.1992.218504
Regular:

A hierarchical representation of parallel algorithms is described that can be systematically mapped onto a class of massive parallel architectures called processor arrays. A notation of... View More

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