IEEE - Institute of Electrical and Electronics Engineers, Inc. - WTPGA: a novel weighted test-pattern generation approach for VLSI built-in self test

Author(s): Siavoshi, F.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1988
Conference Location: Washington, DC, USA, USA
Conference Date: 12 September 1988
Page(s): 256 - 262
ISBN (Paper): 0-8186-0870-6
ISSN (Paper): 1089-3539
DOI: 10.1109/TEST.1988.207810
Regular:

A weighted test-pattern generation approach (WTPGA) is reported and applied to two very well known circuits. WTPGA was applied specifically to a 4-bit ALU (arithmetic logic unit) and a minimal set... View More

Advertisement