IEEE - Institute of Electrical and Electronics Engineers, Inc. - Hierarchical Global Wiring for Custom Chip Design

Author(s): Luk, W.K. ; Tang, D.T. ; Wong, C.K.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1986
Conference Location: Las Vegas, Nevada, USA, USA
Conference Date: 29 June 1986
Page(s): 481 - 489
ISBN (Paper): 0-8186-0702-5
ISSN (Paper): 0738-100X
DOI: 10.1109/DAC.1986.1586132
Regular:

We present a global wiring algorithm used in a top-down physical design environment, i.e. macros are laid out only after global wiring is done, and wires are allowed to pass through macros... View More

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