1149.1-2013 IEEE Standard for Test Access Port and Boundary-Scan Architecture

active - Revision of 1149.1-2001
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Organization: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 13 May 2013
Status: active
Page(s): 1 - 444
ICS Code (Printed circuits and boards): 31.180
ICS Code (Integrated circuits. Microelectronics): 31.200
ISBN (Online): 978-0-7381-8263-6
DOI: 10.1109/IEEESTD.2013.6515989

Abstracts

Regular

Circuitry that may be built into an integrated circuit to assist in the test, maintenance and support of assembled printed circuit boards and the test of internal circuits is defined. The circuitry includes a standard interface through which instructions and test data are communicated. A set of test features is defined, including a boundary-scan register, such that the component is able to respond to a minimum set of instructions designed to assist with testing of assembled printed circuit boards. Also, a language is defined that allows rigorous structural description of the component-specific aspects of such testability features, and a second language is defined that allows rigorous procedural description of how the testability features may be used.

Standard

Circuitry that may be built into an integrated circuit to assist in the test, maintenance and support of assembled printed circuit boards and the test of internal circuits is defined. The circuitry includes a standard interface through which instructions and test data are communicated. A set of test features is defined, including a boundary-scan register, such that the component is able Circuitry that may be built into an integrated circuit to assist in the test, maintenance and support of assembled printed circuit boards and the test of internal circuits is defined. The circuitry includes a standard interface through which instructions and test data are communicated. A set of test features is defined, including a boundary-scan register, such that the component is able to respond to a minimum set of instructions designed to assist with testing of assembled printed circuit boards. Also, a language is defined that allows rigorous structural description of the component-specific aspects of such testability features, and a second language is defined that allows rigorous procedural description of how the testability features may be used.

Document History

1149.1-2013 - IEEE Standard for Test Access Port and Boundary-Scan Architecture - Redline
May 13, 2013 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

Circuitry that may be built into an integrated circuit to assist in the test, maintenance and support of assembled printed circuit boards and the test of internal circuits is defined. The circuitry includes a standard interface through which instructions and test data are communicated. A set of test...

P1149.1/D2012.e29, Nov 2012 - IEEE Approved Draft Standard Test Access Port and Boundary Scan Architecture
May 13, 2013 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

Circuitry that may be built into an integrated circuit to assist in the test, maintenance and support of assembled printed circuit boards and the test of internal circuits is defined. The circuitry includes a standard interface through which instructions and test data are communicated. A set of test...

1149.1-2013 - IEEE Standard for Test Access Port and Boundary-Scan Architecture
May 13, 2013 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

Circuitry that may be built into an integrated circuit to assist in the test, maintenance and support of assembled printed circuit boards and the test of internal circuits is defined. The circuitry includes a standard interface through which instructions and test data are communicated. A set of test...

P1149.1/D2012.e29, Nov 2012 - IEEE Draft Standard Test Access Port and Boundary Scan Architecture
December 5, 2012 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

Circuitry that may be built into an integrated circuit to assist in the test, maintenance and support of assembled printed circuit boards and the test of internal circuits is defined. The circuitry includes a standard interface through which instructions and test data are communicated. A set of test...

P1149.1/D2012.e27, Sep 2012 - IEEE Draft Standard Test Access Port and Boundary Scan Architecture
October 24, 2012 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

Circuitry that may be built into an integrated circuit to assist in the test, maintenance and support of assembled printed circuit boards is defined. The circuitry includes a standard interface through which instructions and test data are communicated. A set of test features is defined, including a ...

1149.1-2001 - IEEE Standard Test Access Port and Boundary Scan Architecture
July 23, 2001 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

Circuitry that may be built into an integrated circuit to assist in the test, maintenance, and support of assembled printed circuit boards is defined. The circuitry includes a standard interface through which instructions and test data are communicated. A set of test features is defined, including a...

1149.1b-1994 - Supplement to IEEE Std 1149.1-1990, IEEE Standard Test Access Port and Boundary-Scan Architecture
January 1, 1995 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A language to describe components that conform to IEEE Std 1149.1-1990 is described. The language is based on the VHSIC Hardware Description Language (VHDL). General characteristics, the overall structure of a boundary-scan description language (BSDL) description, special cases, and example packages...

1149.1-1990 - IEEE Standard Test Access Port and Boundary - Scan Architecture
January 1, 1990 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

IEEE Std. 1149.1-1990, defines circuitry that may be built into an integrated circuit to assist in the test, maintenance, and support of assembled printed circuit boards. The circuitry includes a standard interface through which instructions and test data are communicated. A set of test features is ...

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