896.2-1991 IEEE Standard for Futurebus+ - Physical Layer and Profile Specification

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Organization: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1992
Status: inactive
Page Count: 222
ICS Code (Microprocessor systems): 35.160
ISBN (Online): 0-7381-4587-4
DOI: 10.1109/IEEESTD.1992.101089

Abstracts

Standard

Futurebus+ standards provide systems developers a set of tools with which high-performance bus-based systems may be developed. This architecture provides a wide range of performance scalability over both cost and time for multiple generations of single- and multiple-bus multiprocessor systems. This document, a companion standard to IEEE Std. 896.1-1991, builds on the logical layer by adding requirements for physical layer instantiation. Material in this document includes specifications for node management, live insertion, and profiles. It is to these profiles that products will claim conformance. Other specifications that may be required in conjunction with this standard are the following: IEEE Std 896.1-1991; P896.3, Futurebus+ Recommended Practices; P1212.x, Control and Status Register Architectures; IEEE Std 1194.1-1991, Electrical Characteristics of Backplane Transceiver Logic (BTL) Interface Circuits; and IEEE Std 1301.x, Metric Equipment Practices for Microcomputers.<>

Document History

896.2a-1994 - IEEE Standard for Futurebus+ - Physical Layer and Profile Specification: Errata, Corrections, And
January 1, 1994 - IEEE - Institute of Electrical and Electronics Engineers, Inc.
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896.2-1991 - IEEE Standard for Futurebus+ - Physical Layer and Profile Specification
January 1, 1992 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

Futurebus+ standards provide systems developers a set of tools with which high-performance bus-based systems may be developed. This architecture provides a wide range of performance scalability over both cost and time for multiple generations of single- and multiple-bus multiprocessor systems. This ...

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